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    ASIA unversity > 資訊學院 > 資訊工程學系 > 期刊論文 >  Item 310904400/101767

    Please use this identifier to cite or link to this item: http://asiair.asia.edu.tw/ir/handle/310904400/101767

    Title: Ultra High Voltage Device RESURF LDMOS Technology on Drain- and Source-Centric Design Optimization
    Authors: 楊紹明;Yang, Shao-Ming;*;Chen, Po-An;Chen, Po-An;Pan, CH;Pan, CH
    Contributors: 資訊工程學系
    Date: 2016-11
    Issue Date: 2016-11-08 10:35:24 (UTC+8)
    Abstract: We present drain and source-centric design optimizations of a linear P-top and dual-channel conduction path LDMOS
    (lateral double-diffused metal-oxide semiconductor) structure for low specific on-resistance (Ron.sp) powered transistor devices. The
    design was simulated using TCAD tools, and a real silicon device was fabricated successfully in accordance with the simulation. The
    3D effect in the cylindrical layout with the linear P-top doping profiles was designed using an analytical model to obtain optimal
    charged balance for the drain- and source-centric regions. The silicon result, with an optimized P-top doping process window, achieved
    a breakdown voltage (BV) of 842 V, which was higher than 800 V. Thus, the use of a dual-channel conduction path technique with an
    N-top layer implanted over the P-top can improve Ron.sp by 25% without compromising BV.
    Relation: Applied Mathematics & Information Sciences
    Appears in Collections:[資訊工程學系] 期刊論文

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