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    ASIA unversity > 資訊學院 > 資訊工程學系 > 博碩士論文 >  Item 310904400/110912


    Please use this identifier to cite or link to this item: http://asiair.asia.edu.tw/ir/handle/310904400/110912


    Title: UHV 700v-800v JFET Innovated Device Structure Combined with Control Gate.
    Authors: Imam, Syed Neyaz
    Contributors: 資訊工程學系
    Keywords: UHV JFET、Control Gate、Multiple RESURF、2D simulation、LDMOS
    Date: 2017
    Issue Date: 2018-06-05 11:52:27 (UTC+8)
    Publisher: 亞洲大學
    Abstract: In this thesis a novel N-channel UHV 700v-800v JFET innovated device structure combined with control gate is studied. The UHV 600v LDMOS popular for high voltage power switching device and it may be ON/OFF device. For OFF device there are many LDMOS devices available but when it comes for ON device JFET is required where as LDMOS is OFF device.
    Since JFET is a normally on device so it is widely used as sensor and safety devices like fire alarm and automobile sensor etc. The various Pinch-off voltage can be adjusted through Nwell mask and gap between P-top and PPlus by keeping the breakdown voltage in between the range of 700v-800v. By using 2D simulation method instead of 3D simulation is more time convenient and time saving for optimization and design. Multi ring P-top structure is not only capable of adjusting various Pinch-off voltage it also enhances breakdown compared with uniform P-top structure.
    We can design the desired pinch-off voltage without any additional process mask. N-channel JFETs with different pinch-off voltages can be implemented in the low-cost BCD Integration.
    Appears in Collections:[資訊工程學系] 博碩士論文

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