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    Items for Author "楊紹明" 

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    Showing 89 items.

    Collection Date Title Authors Bitstream
    [103學年] 103-1學習社群讀書會 2015 半導體製程與元件模擬、半導體物理、積體電路、固態物理 楊紹明
    [光電與通訊學系] 博碩士論文 2015-06 Reliability Analysis of Amorphous Silicon Thin-Film Transistors during Accelerated ESD stress 蔡宗叡; TSAI, JUNG-RUEY; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; Cha, Ruey Dar; Chang, Ruey Dar; We, Ting Ting; Wen, Ting Ting
    [光電與通訊學系] 期刊論文 2015-06 International Symposium on the Physical and Failure Amalysis of Integrated Circuits 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [光電與通訊學系] 期刊論文 2012-09 Failure Analysis of Power MOSFETs based on Multi-finger Configuration under Unclamped Inductive Switching (UIS) Stress Condition 楊紹明; Yang, Shao-Ming; 蔡宗叡; Tsai, Jung-Ruey; 許健; Sheu, Gene
    [光電與通訊學系] 期刊論文 2012-09 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance on reverse recovery 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [光電與通訊學系] 期刊論文 2012-08 Analysis of LDMOS for Effect of Finger and Device-width on Gate Feedback Charge 楊紹明; Yang, Shao-Ming; 蔡宗叡; Tsai, Jung-Ruey; 許健; Sheu, Gene
    [光電與通訊學系] 期刊論文 2012-03 A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN/GaN Based Heterostructure 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2012-03 A New Methodology to Investigate the Effect of Stress and Bias on 2DEG and Drain Current of AlGaN-GaN Based Heterostructure 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2012-03 Optimization of nLDMOS ruggedness under Unclamped Inductive Switching (UIS) stress conditions by poly-gate extension 蔡宗叡; Tsai, Jung-Ruey; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2012-03 Analysis of LDMOS for Effect of Fingers, Device-Width and Inductance (Load) on Reverse Recovery 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [光電與通訊學系] 期刊論文 2011-11 Design of Multiple RESURF LDMOS with P-top rings and STI regions in 65nm CMOS Technology 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; 蔡宗叡; Tsai, Jung-Ruey
    [光電與通訊學系] 期刊論文 2011-11 Self-Consistent Electro-Thermo-Mechanical Analysis of AlN Passivation Effect on AlGaN/GaN HEMTs 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2011-11 Development of ESD Robustness Enhancement of a Novel 800V LDMOS Multiple RESURF with Linear P-top Rings 蔡宗叡; Tsai, Jung-Ruey; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2011-08 Improvement of Electrical Characteristics in LDMOS by the Insertion of PBL and Gate Extended Field Plate Technologies 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey; 楊紹明; Yang, Shao-Ming
    [光電與通訊學系] 期刊論文 2011-08 Application of Multi-Lateral Double Diffused Field Ring in Ultrahigh-Voltage Device MOS Transistor Design 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey
    [光電與通訊學系] 期刊論文 2011-08 Effects of SiO2 passivation on AlGaN/GaN HEMT by self-consistent electro-thermal-mechanical simulation 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey
    [光電與通訊學系] 期刊論文 2010-11 A 5V/200V SOI Device with a Vertically Linear Graded Drift Region 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; 蔡宗叡; Tsai, Jung-Ruey
    [國際企業學系] 期刊論文 2014-05 Optimization of NLDMOS Structure for Higher breakdown voltage and lower on-resistance hema; hema; 許健; Sheu, Gene; aryadeep; aryadeep; erry; erry; 楊紹明; Yang, Shao-Ming; chen, PA; chen, PA
    [國際企業學系] 期刊論文 2014-05 A Study of Interstitial Effect on UMOS Performance Hema E. P; 許健; Sheu, Gene; Aryadeep M; 楊紹明; Yang, Shao-Ming
    [國際企業學系] 期刊論文 2014-05 An Accurate Prediction for as-Implanted Doping Profile Calibration Using Different Ion Implantation Vivek; Vivek; pradahana; pradahana; 許健; Sheu, Gene; 王俊博; Subramaya; Subramaya; Amanullah; Amanullah; Sharma; Sharma; 楊紹明; Yang, Shao-Ming
    [國際企業學系] 期刊論文 2014-01 Optimization of SiC Schottky Diode using Linear P-top for Edge Mri, Aryadeep; Mrinal, Aryadeep; Kumar, Vijay; Vivek N, Man; Vivek N, Manjunatha M; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [國際企業學系] 期刊論文 2014-01 A Novel Ultra High Voltage Sidewall Implant Super Junction MOSFET Using Arsenic Implantation under Trench Bottom Kumar, Rahul; Kumar, Rahul; EmitaYulia, H; Hapsari, EmitaYulia; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Anil Kumar; Anil Kumar TV
    [生物科技學系] 期刊論文 2016-04 AN EXPERIMENTAL AND ANALYTICAL METHOD TO OBSERVE THE POLYSILICON NANOWIRE MOSFET THRESHOLD VOLTAGE 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; *; Aanand; Aanand; Syed; Imam, Syed Sarwar; 范宗宸; Fan, Chung-Chen; Lu, Shao Wei; Lu, Shao Wei
    [生物科技學系] 期刊論文 2016 Silicon nanowire sensor for DNA biosensor applications 李佳賢; Li, Chia-Hsien; *; Lu, Shao-Wei; Lu, Shao-Wei; Aanand; Aanand; Sarwar, Syed; Imam, Syed Sarwar; 楊紹明; Yang, Shao-Ming; 范宗宸; Fan, Chung-Chen; 許健; Sheu, Gene
    [資訊工程學系] 會議論文 2012-09 Characterization of NBTI by Evaluation of Hydrogen Amount in the Si/SiO2 Interface 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 會議論文 2012-08 Analysis of LDMOS for Effect of Finger and Device-width on Gate Feedback 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 會議論文 2012-09 Characterization of NBTI by Evaluation of Hydrogen Amount in the Si/SiO2 Interface 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 會議論文 2012-09 Failure Analysis of Power MOSFETs based on Multifinger Configuration under Unclamped Inductive 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 會議論文 2012-08 Analysis of LDMOS for Effect of Finger and Device-width on Gate Feedback 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 會議論文 2010-08 Optimizing NSCR ESD Protection Device for BCD 40V Technology 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 會議論文 2009-08 Dependence of Breakdown Voltage on Drift Length and Linear Doping Gradients in SOI RESURF LDMOS Devices 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 會議論文 2009-05 A High Performance 80V Smart LDMOS Power Device Based on thin oxide technology 許健; Sheu, Gene; 楊紹明; 許愉珊
    [資訊工程學系] 會議論文 2009-05 A High Performance 80V Smart LDMOS Power Device Based on thin oxide technology 許健; Sheu, Gene; 楊紹明; 許愉珊; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2017 AN EXPERIMENTAL AND ANALYTICAL METHOD TO OBSERVE THE aanand; aanand; syed; 許健; Gene Sheu; 楊紹明; Shao-Ming,Yang
    [資訊工程學系] 期刊論文 2016-11 Ultra High Voltage Device RESURF LDMOS Technology on Drain- and Source-Centric Design Optimization 楊紹明; Yang, Shao-Ming; *; Chen, Po-An; Chen, Po-An; Pan, CH; Pan, CH
    [資訊工程學系] 期刊論文 2016-05 EFFECT OF TIME AND TEMPERATURE ON EPITAXY GROWTH 安南; Aanand; *; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; 賴, 秋 仲; Sarwar, Syed; Imam, Syed Sarwar
    [資訊工程學系] 期刊論文 2016-03 Effect of Time and Temperature on Epitaxy Growth Aanand; Aanand; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; *; 賴秋仲; Lai, Ciou-Jhong; Syed; Imam, Syed Sarwar
    [資訊工程學系] 期刊論文 2015-03 High Voltage NLDMOS with Multiple-RESURF Structure to Achieve Improved On-resistance 楊紹明; Yang, Shao-Ming; *、Hema, EP; Hema, EP; Mri, Aryadeep; Mrinal, Aryadeep; 許健; Sheu, Gene; 陳柏安; Chen, PA
    [資訊工程學系] 期刊論文 2015-03 A HSPICE Macro Model for the ESD Behavior of Gate Grounded NMOS and Gate coupled NMOS 楊紹明; Yang, Shao-Ming; Hema, EP; Hema, EP; 許健; Sheu, Gene; Mri, Aryadeep; Mrinal, Aryadeep; Md.Amanulla; Md.Amanullah; 陳柏安; Chen, PA
    [資訊工程學系] 期刊論文 2015-03 High Voltage NLDMOS with Multiple-RESURF Structure to Achieve Improved On-resistance 楊紹明; Yang, Shao-Ming; Hema, EP; Hema, EP; Mri, Aryadeep; Mrinal, Aryadeep; 許健; Sheu, Gene; 陳柏安; Chen, PA
    [資訊工程學系] 期刊論文 2015-03 A HSPICE Macro Model for the ESD Behavior of Gate Grounded NMOS and Gate coupled NMOS 楊紹明; Yang, Shao-Ming; Hema, EP; Hema, EP; 許健; Sheu, Gene; Mri, Aryadeep; Mrinal, Aryadeep; Md.Amanulla; Md.Amanullah; 陳柏安; Chen, PA
    [資訊工程學系] 期刊論文 2015-03 Negative e-beam resists using for nano-imprint lithography and silicone mold fabrication Anil Kumar,; Anil Kumar, T.V.; Shy, S.L; Shy, S.L; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Chen, M.C.; Chen, M.C.; Hong, C.S.; Hong, C.S.
    [資訊工程學系] 期刊論文 2014-03 Investigation of Current Density and Hotspot Temperature Distribution Effects on P-channel LDMOSFET Unclamped Inductive Switching ;UIS) Test Kur, Erry Dwi; Kurniawan, Erry Dwi; Fra, Antonius; Ankit Kuma; Ankit Kumar; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2014-03 High Performance Gallium Nitride GAA Nanowire with 7nm diameter for Ultralow-Power Logic Applications Anil Kumar, T; Ch, Min-Cheng; Chen, Min-Cheng; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2014-03 A Low-cost 900V rated Multiple RESURF LDMOS Ultrahigh-Voltage Device MOS Transistor Design without EPI Layer Anil Kumar, T; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; Chen, P.A; Chen, P.A
    [資訊工程學系] 期刊論文 Process Integration of Best in Class Specific-on Resistance of 20V to 60V 0.18μm Bipolar CMOS DMOS Technology Yulia, Emita; Hapsari, Emita Yulia; Kumar, Rahul; Kumar, Rahul; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Anil, T.V.; Anil, T.V.
    [資訊工程學系] 期刊論文 Optimization of SiC Schottky Diode using Linear P for Edge Termination Mri, Aryadeep; Mrinal, Aryadeep; Kumar, Vijay; Vivek, N; Vivek, N; Manjunatha, M; Manjunatha, M; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 Effect of Trench Depth and Trench Angle in a High Voltage Polyflanked-Super junction MOSFET Kumar, Vijay; Srinat, Grama; Shreyas, Grama Srinath; Nidhi, Karuna; Nidhi, Karuna; Agarw, Neelam; Agarwal, Neelam; Kumar, Ankit; Kumar, Ankit; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Mri, Aryadeep; Mrinal, Aryadeep
    [資訊工程學系] 期刊論文 Design of a low on resistance high voltage (<100V) novel 3D NLDMOS with side STI and single P-top layer based on 0.18um BCD Process Technology Kumar, Ankit; Kumar, Ankit; Yulia, Emita; Hapsari, Emita Yulia; Kuma, Vasanth; Kumar, Vasanth; Mri, Aryadeep; Mrinal, Aryadeep; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Ningar, Vivek; Ningaraju, Vivek
    [資訊工程學系] 期刊論文 A Novel Ultra High Voltage Sidewall Implant Super Junction MOSFET Using Arsenic Implantation under Trench Bottom Kumar, Rahul; Kumar, Rahul; EmitaYulia, H; Hapsari, EmitaYulia; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Anil Kumar, T
    [資訊工程學系] 期刊論文 Effects of Antimony and Arsenic Ion Implantation on High Performance of Ultra High Voltage Device Kum, Vasantha; Manjunatha, M; Manjunatha, M; Suresh, Vinay; Suresh, Vinay; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; 陳柏安; Chen, P A
    [資訊工程學系] 期刊論文 Investigation of Substrate Resistance and Inductance on Deep Trench Capacitor for RF Application kumar, Vikash; kumar, Vikash; Aminul, Ashif; Aminulloh, Ashif; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 P-type Shallow Junction as-Implanted Profile Prediction Using Kinetic Monte Carlo Simulation Fra, Antonius; Kur, Erry Dwi; Kurniawan, Erry Dwi; Manjunatha, M; Manjunatha, M.; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 Ron Improvement with Duplex Conduction Channel Manjunatha; Manjunatha; Vasanth; Vasanth; kumar, anil; kumar, anil; Kumar, Jaipal; Kumar, Jaipal; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; 陳柏安; P.A.Chen
    [資訊工程學系] 期刊論文 Unclamped Inductive Switching Stress Failure Mechanism of LDMOS Kumar, Vijay; Srinat, Grama; Shreyas, Grama Srinath; Khau, Chinmoy; Khaund, Chinmoy; Agarw, Neelam; Agarwal, Neelam; Nidhi, Karuna; Nidhi, Karuna; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 Verification of Ruggedness and Failure in LDMOS Chinmoy; Chinmoy; Shreyas; Shreyas; Kumar, Vijay; Kumar, Vijay; Neelam; Neelam; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 Accurate equivalent circuit model of deep trench capacitor by numerical simulation and analytical calculation Fathna, Ashif; Fathna, Ashif; kumar, Vikash; kumar, Vikash; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 Novel structure of deep trench capacitor with higher breakdown and higher capacitance density for Low Dropout Voltage regulator Fathna, Ashif; Fathna, Ashif; kumar, Vikash; kumar, Vikash; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2013-10 A Novel Ultra High Voltage Sidewall Implant Super Junction MOSFET Using Arsenic Implantation under Trench Bottom Kumar, Rahul; Kumar, Rahul; EmitaYulia, H; Hapsari, EmitaYulia; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Anil Kumar, T
    [資訊工程學系] 期刊論文 2013-10 Design of a low on resistance high voltage (<100V) novel 3D NLDMOS with side STI and single P-top layer based on 0.18um BCD Process Technology Ankit Kumar; Emita Yulia; Emita Yulia Hapsari; Vasanth Kuma; Vasanth Kumar; Aryadeep Mri; Aryadeep Mrinal; 許健; Gene Sheu; 楊紹明; Shao-Ming Yang; Vivek Ningar
    [資訊工程學系] 期刊論文 2013-10 Effect of Trench Depth and Trench Angle in a High Voltage Polyflanked-Super junction MOSFET Kumar, Vijay; Srinat, Grama; Shreyas, Grama Srinath; Nidhi, Karuna; Nidhi, Karuna; Agarw, Neelam; Agarwal, Neelam; Kumar, Ankit; Kumar, Ankit; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Mri, Aryadeep; Mrinal, Aryadeep
    [資訊工程學系] 期刊論文 2013-10 Optimization of SiC Schottky Diode using Linear P for Edge Termination Mri, Aryadeep; Aryadeep Mrinal,; Kumar, Vijay; Vijay Kumar M P,; Vivek N,; Vivek N,; Manjunatha, M; Manjunatha M,; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2013-10 Process Integration of Best in Class Specific-on Resistance of 20V to 60V 0.18μm Bipolar CMOS DMOS Technology Yulia, Emita; Hapsari, Emita Yulia; Kumar, Rahul; Kumar, Rahul; 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; Anil, T.V.; Anil, T.V.
    [資訊工程學系] 期刊論文 2013-06 Ron Improvement with Duplex Conduction Channel Manjunatha; Manjunatha; Vasanth; Vasanth; kumar, anil; kumar, anil; Kumar, Jaipal; Kumar, Jaipal; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene; 陳柏安; P.A.Chen
    [資訊工程學系] 期刊論文 2013-06 Verification of Ruggedness and Failure in LDMOS Chinmoy; Chinmoy; Shreyas; Shreyas; Kumar, Vijay; Kumar, Vijay; Neelam; Neelam; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2013-06 Investigation in characteristics of 1200V Vertical IGBT for different trench designs Anil Kumar, P; Anil Kumar, P; Suresh, Vinay; Vinay Suresh,; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2013-02 Accurate equivalent circuit model of deep trench capacitor by numerical simulation and analytical calculation Fathna, Ashif; Fathna, Ashif; kumar, Vikash; kumar, Vikash; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2013-02 Novel structure of deep trench capacitor with higher breakdown and higher capacitance density for Low Dropout Voltage regulator Fathna, Ashif; Fathna, Ashif; kumar, Vikash; kumar, Vikash; 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2012-09 Optimization of ESD Protection Device Using SCR 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2012-08 Optimization of ESD Protection Device Using SCR Structure of a Novel STI-sided LDMOS with P-top Layer for 5 V Operating Voltage 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2011-07 An 800 Volts High Voltage Interconnection Level 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2011 A Novel 800V Multiple RESURF LDMOS Utilizing 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-11 A Novel 800V Multiple RESURF LDMOS Utilizing Linear P-top Rings 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-11 An 800 Volts High Voltage Interconnection Level Shifter Using Floating Poly Field Plate (FPFP) Method 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-10 ESD Simulation on GGNMOS for 40V BCD 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-07 An Analytical Model of Surface Electric Field Distributionsin in Ultrahigh-Voltage Metal–Oxide–Semiconductor Devices 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-07 An Analytical Model of Surface Electric Field Distributions in Ultrahigh-Voltage Buried P-top Lateral Diffused Metal-Oxide-Semiconductor Devices 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; 張怡楓; Chang, Yi-Fong; 曹世昌; Tsaur, Shyh-Chang
    [資訊工程學系] 期刊論文 2010-03 Combining 2D and 3D Device Simulations for Optimizing LDMOS Design 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-03 Reduction of Kink Effect in SOI LDMOS Structure with Linear Drift Region Thickness 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2010-03 Comparison of High Voltage (200-300 Volts) Lateral Power MOSFETs for Power Integrated Circuits 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; 陳兆南
    [資訊工程學系] 期刊論文 2009-08 Dependence of Breakdown Voltage on Drift Length and Linear Doping Gradients in SOI RESURF LDMOS Devices 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 期刊論文 2009-01 A High Performance 80V Smart LDMOS Power Device Based on Thin SOI Technology 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2009 Reduced Kink Effect in An SOI LDMOS Structure with Graded Drift Region Thickness 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming
    [資訊工程學系] 期刊論文 2009 An Analytical Model for Surface Electric Field Distributions in Ultra High Voltage (800V) Buried P-top LDMOS Devices 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; 曹世昌; Tsaur, Shyh-Chang
    [資訊工程學系] 期刊論文 2009 Comparison of High Voltage (200-300 Volts) Devices for Power Integrated Circuits 許健; Sheu, Gene; 楊紹明; Yang, Shao-Ming; 曹世昌; Tsaur, Shyh-Chang
    [資訊工程學系] 期刊論文 2009 The Reliability of 200V P-channel Silicon-On-Insulator LDMOS on High Side operation 楊紹明; Yang, Shao-Ming; 許健; Sheu, Gene
    [資訊工程學系] 科技部研究計畫 2011 新穎功率元件靜電防護結構之設計研究與可靠度測試在2維/3維元件模擬系統之建立 楊紹明
    [資訊工程學系] 科技部研究計畫 2009 超高壓功率元件結構開發與三維佈局設計之模擬研究 楊紹明

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